NIT Delhi Recruitment 2020 Various Post
NATIONAL INSTITUTE OF TECHNOLOGY DELHI
NIT(NATIONAL INSTITUTE OF TECHNOLOGY DELHI )Invites Online interview Various Post In under Special Manpower Development Programme (SMDP) – Chipto-System Design (C2SD) funded by Ministry of Electronics and IT, (MeitY) Govt. of India, in the department of Electronics and Communication Engineering of National Institute of Technology (NIT) Delhi.
Read Details below for NIT Delhi Recruitment 2020
Vacancies Details
Position : Project Associate -1,
Lab Engineer-1
Guest Faculty (Project)-1
No of Position : 03
Consolidated Pay : Project Associate- Rs.20,000/- Per Month Consolidated.
Lab Engineer- Rs.34,000/- Per Month Consolidated
Guest Faculty (Project)- Rs.40,000/- Per Month Consolidated
Posting Tenure : The duration of above posts will be for six months or date of completion of project whichever is earlier. The candidates if selected for any of above post may be deputed anywhere in India for attending workshops/meeting related to the project
Qualification
Project Associate -1(Essential Qualification) : B. Tech in Electronics and Communication Engineering (ECE) with minimum CGPA of 6.5 and having working experience in VLSI related software.
Desirable : Working knowledge in UNIX/MATLAB/scripting,Cadence, Mentor graphics, Synopsys TCADetc.
Lab Engineer(Essential Qualification) : B.E. / B. Tech. in Electronics or Electronics & Communication or Computer Science or Electrical Engineering, with a minimum CGPA of 6.5 or minimum 60 % marks, having a working knowledge on Windows, Linux and VLSI Software tools.
Desirable : M.E. / M. Tech. in VLSI Design or Microelectronics or equivalent. Working knowledge of VLSI CAD tools like Cadance/ Mentor/ Magma/ Tanner/ Xilinx & Experience in Linux system administration.
Guest Faculty (Project)(Essential Qualification) :Ph.D. in the field of VLSI Design or Microelectronics or equivalent
Desirable : Ph.D. in field of VLSI & related Subjects, Publication in reputed journals, Working knowledge of VLSI tools like Cadance/ Mentor/ Synopsys/ Xilinx etc.
Important Details
Date of Interview for Lab Engineer: 8th October 2020 12 Noon onwards.
Date of Interview for Guest Faculty: 9th October 2020 12 Noon onwards.